EECS 388 Laboratory

Welcome to EECS 388: Computer Systems and Assembly Language. In this class you will learn how computer systems are constructed and how to program those computer systems using assembly language. Learning will focus on internal microprocessor organization, programming in assembly language, performing input and output, and controlling external devices. The interaction of these four basic computing elements is at the core of effective embedded system design and is important knowledge in general purpose computing as well.

The laboratory for this class makes use of the Xilinx XUP development board pictured on the right. This development board is built around the Virtex-II Pro FPGA. These FPGAs are high-performance, high-density reconfigurable devices which students will use for system-on-chip development. Students will use these devices and their associated development environments to develop fully functional embedded system designs which they will program using a combination of assembly language and C.

In addition to the FPGA, the XUP development boards contain many integrated peripherals which will be used by the students. Using peripherals such as serial ports, LEDs, push buttons, and switches, students will learn the basic mechanisms of I/O and external device control.

The system designs in this class will all make use of the MicroBlaze microprocessor; a 32-bit soft-processor core developed by Xilinx for use in their FPGAs. This processor is a simple but modern 3 or 5 stage pipelined microprocessor which is based on the DLX architecture described by Patterson and Hennessy in their computer architecture book. The instruction set architecture (ISA) of the MicroBlaze will be studied in depth and will be used by students in most of the laboratory exercises.

Students in this course should leave the class with knowledge of computer system design and assembly programming. Students should also leave with understanding of the basic relationships between high-level languages, assembly level programming, and hardware level system design.